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unaligned    
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  • Did any x86 CPU optionally trap unaligned access?
    x86 CPUs have always supported unaligned load store Early RISC CPUs didn't So imagine writing portable code on a 386 It seems to work fine, but how do you know you haven't accidentally misaligne
  • What did it cost the 8086 to support unaligned access?
    The Intel 8086 supported unaligned loads and stores of 16-bit data, e g mov ax, foo was guaranteed to work even if foo was odd What did this cost, in terms of performance and chip area, compared
  • Does the 8080 always handle unaligned access correctly?
    The 8080 Z80 has no concept of an unaligned access - It simply accesses the byte, and, if needed the following one What you seem to be referring to is a 6502 quirk
  • 8086 - x86 memory alignment - Retrocomputing Stack Exchange
    For the 8086, unaligned word loads (first byte at an odd address) require two memory accesses, but an aligned word (first byte at an even address) can be loaded in one This is excellently explaine
  • Does the 6800 always handle unaligned access correctly?
    7 I asked a similar question about the Intel 8080 to which I guessed the answer would probably be yes, because later Intel CPUs did fully handle unaligned access I am less sure about the Motorola 6800, because several of the inventors went on to invent the MOS Technology 6502, which in some contexts treats page boundaries as special
  • MC68000: address error in initial PC - Retrocomputing Stack Exchange
    After an MC68000 processor is released from reset, it fetches the initial stack pointer and initial program counter from the vector table at addresses 0-3 (for the SP) and addresses 4-7 (for the PC)
  • What was the minimum amount of addressable memory? When and why did . . .
    The majority of 'scientific' machines were word-addressable; the word size was a compromise between a desire for arithmetic range and precision, and the cost of memory (and address bits) 36 bits was a common word size What became clear was that addressing down to the character level was useful for many purposes; even scientific machines needed to generate readable output Prior to the IBM
  • m68k - What do the byte-select signals in the 68000 do . . .
    68000 program fetch had to be aligned, opcodes may only start on even addresses (because of the missing A0) Branches, jumps or vectoring to odd addresses will throw an exception But for data access (especially with memory mapped I O) a bytewise, unaligned access is inevitable and lead to the LDS UDS signals solution
  • c - Are there architectures with alignment greater than the size of . . .
    There's a distinction between what the ISA requires and what the C compiler gives you by default (e g , machine can do unaligned reads, compiler knows performance better so aligns struct members automatically) Usually there's a compiler-specific way to avoid this, but not necessarily
  • Are later 68000 variants backward compatible with earlier ones?
    Some of the members (most of >=68020, except CPU32) will happily access words and long words on unaligned addresses, some others will trap out Cache handling, strategy, and size is different for all 68k members that have data or instruction caches





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